Performance Modeling of Multithreaded Distributed Memory Architectures

In multithreaded distributed memory architectures, long{ latency memory operations and synchronization delays are tolerated by suspending the current thread and switching to another thread, which is executed concurrently with the long{latency operation of the suspended thread. Timed Petri nets are used to model several multithreaded architectures at the instruction and thread levels. Model evaluation results are presented to illustrate the in uence of di erent model parameters on the performance of the system.